Fabrication Process of Silicon Wafers

The procedure to convert raw silicon into a usable crystal substrate for semiconductor processes begins with mining for pure Silicon Dioxide. Mainly, silicon now is made by the diminution of SiO2 with carbon in an electric kiln at a temperature ranges from 1500 to 2000oC. By carefully selecting the pure sand, the result is marketable brown metallurgical grade silicon of 97% purity, which is eventually used for semiconductors.

MG-Si is reacted with HCl to form tri-chlorosilane in a reactor at 300ºC. TCS (trichlorosilane) is a middle compound for poly-silicon manufacturing. In converting MG-Si to TCS, impurities, such as Fe, Al and B are removed. This pure TCS is subsequently   diluted with H2. It ultimately flows into a deposition reactor, where it is transformed into silicon. After achieving the highest level of purity, the atomic structure of the silicon undergoes a process known as crystal growing to convert the poly-crystalline silicon into samples with a single crystal orientation, commonly known as ingots.

The Polysilicon is broken into 1 to 3 inch chunks that undergo stringent surface etching and cleaning. These pieces are then packed into quartz crucibles to meltdown in a furnace. A mono-crystalline Silicon is installed into a shaft in the upper chamber of the furnace. The seed is lowered so that it dips about 2mm into the melted Silicon. Then, the seed is slowly retracted from the surface, allowing the melted silicon to solidify.

Both the crucible and seeds are rotated in reverse directions to allow formation of round crystals. The kiln must be stable and isolated from vibrations. Once the growth process is complete, the crystal is cooled down in the furnace for up to 7 hours.

Silicon Wafer fabrication involves a series of defined chemical and mechanical process steps that are essential to turn the ingot segment into a wafer. During these steps, the wafer surfaces and dimensions must be accurate. Each step is designed to bring the wafer into proper shape.

• The first step is Multi-Wiring Slicing. A thin wire is set over cylindrical spools so that hundreds of similar wire segments at once travel through the ingot. After this process, wafers are exposed to a complex polishing process.

• Lapping the wafers remove saw marks and defects from the front and back side of the wafers. Edge rounding is done after lapping and is important for the structural consistency of the wafer.

The quality of a polished wafer is very important because the defects generated during crystal growth of the wafer needs to be removed completely. These defects on the surface of wafers can decline the performance of the devices. The finest solution to this problem is to deposit a supplementary layer of pure Silicon on the top of a polished Si wafer. After a last Polish and Clean, wafers are ready for a final inspection before delivery. Different Methods of Silicon wafer Fabrication:

• Horizontal gradient freeze method: It is a static technique where the melt is steadily solidified by the movement of a temperature grade along the melt. A sealed tube consists of different materials like pure Gallium and Arsenic. The Gallium is placed in quartz at one end of the kiln, and the Arsenic at the other side. The quartz tube is placed in a kiln where the segment containing the As is held at 620oC, while the section with Ga is ramped at 1270o When the final crystals are formed, they must be cooled slowly to avoid dislocations.

• Horizontal Bridgeman method: The furnace moves along the quartz tube in such a way that the solidification of the melted silicon starting from the seed is achieved as it moves from the hotter to the colder section of the furnace. The shape of the crystal is controlled by the walls of the tube. The crystals are usually D-shaped. The lower thermal stresses can be achieved with this method.

• Vertical Bridgeman method- In vertical Bridgeman method, the quartz contains the seed at the bottom and polycrystalline silicon above it. The initial charge and a portion of the seed are melted and the quartz is lowered slowly into the base section of the furnace.

• Vertical Gradient Freeze – In this technique, the quartz and the kiln are kept stationary and the growth is achieved slowly by cooling the melt silicon at a suitable temperature grade. The major advantage of this technique is its reduced radial and axial temperature grades, which transforms the silicon into low dislocation densities.